Z8F1680SH020SG Datasheet, PDF (18/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
xviii
List of Tables
Table 1. Z8 Encore! XP F1680 Series Part Selection Guide . . . . . . . . . . . . . . . . . . . . 2
Table 2. F1680 Series MCU Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3. Z8 Encore! XP F1680 Series Package Options . . . . . . . . . . . . . . . . . . . . . . 10
Table 4. Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 5. Pin Characteristics (20-, 28-, 40- and 44-pin Devices). . . . . . . . . . . . . . . . . 17
Table 6. F1680 Series MCU Program Memory Maps . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 7. F1680 Series MCU Flash Memory Information Area Map . . . . . . . . . . . . . 22
Table 8. Register File Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 9. Reset and Stop Mode Recovery Characteristics and Latency . . . . . . . . . . . 32
Table 10. Reset Sources and Resulting Reset Type . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 11. Stop Mode Recovery Sources and Resulting Action . . . . . . . . . . . . . . . . . . 38
Table 12. Reset Status Register (RSTSTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 13. Reset Status Per Event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 14. Power Control Register 0 (PWRCTL0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 15. Setup Condition for LVD and VBO Circuits in Different Operation Modes 45
Table 16. Port Availability by Device and Package Type . . . . . . . . . . . . . . . . . . . . . . 46
Table 17. Port Alternate Function Mapping, 20-Pin Parts1,2. . . . . . . . . . . . . . . . . . . . 49
Table 18. Port Alternate Function Mapping, 28-Pin Parts1,2. . . . . . . . . . . . . . . . . . . . 51
Table 19. Port Alternate Function Mapping, 40-/44-Pin Parts1,2 . . . . . . . . . . . . . . . . 54
Table 20. GPIO Port Registers and Subregisters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table 21. Port A–E GPIO Address Registers (PxADDR) . . . . . . . . . . . . . . . . . . . . . . 59
Table 22. Port A–E Control Registers (PxCTL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 23. Port A–E Data Direction Subregisters (PxDD) . . . . . . . . . . . . . . . . . . . . . . 60
Table 24. Port A–E Alternate Function Subregisters (PxAF). . . . . . . . . . . . . . . . . . . . 61
Table 25. Port A–E Output Control Subregisters (PxOC) . . . . . . . . . . . . . . . . . . . . . . 62
Table 26. Port A–E High Drive Enable Subregisters (PxHDE) . . . . . . . . . . . . . . . . . . 62
Table 27. Port A–E Stop Mode Recovery Source Enable Subregisters (PxSMRE). . . 63
Table 28. Port A–E Pull-Up Enable Subregisters (PxPUE) . . . . . . . . . . . . . . . . . . . . . 63
PS025015-1212
PRELIMINARY
List of Tables