Z8F1680SH020SG Datasheet, PDF (17/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
xvii
Figure 56. Target OCD Connector Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
Figure 57. Interfacing the On-Chip Debugger’s DBG Pin with an RS-232 Interface, 
#1 of 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
Figure 58. Interfacing the On-Chip Debugger’s DBG Pin with an RS-232 Interface, 
#2 of 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 297
Figure 59. OCD Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 298
Figure 60. Synchronous Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
Figure 61. Start Bit Flow Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 301
Figure 62. Recommended 20MHz Crystal Oscillator Configuration . . . . . . . . . . . . . 322
Figure 63. Connecting the On-Chip Oscillator to an External RC Network . . . . . . . . 323
Figure 64. Typical RC Oscillator Frequency as a Function of External Capacitance 324
Figure 65. Recommended 32kHz Crystal Oscillator Configuration . . . . . . . . . . . . . . 325
Figure 66. Op Code Map Cell Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 345
Figure 67. First Op Code Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 347
Figure 68. Second Op Code Map after 1FH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 348
Figure 69. Typical Active Flash Mode Supply Current (1–20MHz) . . . . . . . . . . . . . 353
Figure 70. Typical Active PRAM Mode Supply Current (1–20MHz) . . . . . . . . . . . . 354
Figure 71. Typical Active Flash Mode Supply Current (32–900kHz) . . . . . . . . . . . . 354
Figure 72. Typical Active PRAM Mode Supply Current (32–900kHz) . . . . . . . . . . . 355
Figure 73. STOP Mode Current Consumption as a Function of V_DD with 
Temperature as a Parameter; all Peripherals Disabled . . . . . . . . . . . . . . . 356
Figure 74. VDD Versus Maximum System Clock Frequency . . . . . . . . . . . . . . . . . . 357
Figure 75. Port Input Sample Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 366
Figure 76. GPIO Port Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 367
Figure 77. On-Chip Debugger Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 368
Figure 78. UART Timing With CTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 369
Figure 79. UART Timing Without CTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 370
PS025015-1212
PRELIMINARY
List of Figures