Z8F1680SH020SG Datasheet, PDF (367/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
342
Assembly
Mnemonic
POPX dst
PUSH src
Table 186. eZ8 CPU Instruction Summary (Continued)
Symbolic Operation
dst ← @SP
SP ← SP + 1
SP ← SP – 1
@SP ← src
Address
Mode
dst src
ER
R
IR
IM
Op
Code(s)
(Hex)
D8
Flags
Fetch Instr.
C Z S V D H Cycles Cycles
–––––– 3
2
70
–––––– 2
2
71
2
3
IF70
3
2
PUSHX src SP ← SP – 1
ER
@SP ← src
RCF
C←0
RET
PC ← @SP
SP ← SP + 2
C8
–––––– 3
2
CF 0 – – – – – 1
2
AF
–––––– 1
4
RL dst
R
90
* * * *–– 2
2
RLC dst
RR dst
C
D7 D6 D5 D4 D3 D2 D1 D0
IR
dst
R
C
D7 D6 D5 D4 D3 D2 D1 D0
dst
IR
R
91
2
3
10
* * * *–– 2
2
11
2
3
E0
* * * *–– 2
2
D7 D6 D5 D4 D3 D2 D1 D0
dst
C _IR
RRC dst
R
D7 D6 D5 D4 D3 D2 D1 D0
C
dst
IR
SBC dst, src dst ← dst – src – C
r
r
E1
2
3
C0
* * * *–– 2
2
C1
2
3
32
****1* 2
3
r
Ir
33
2
4
R
R
34
3
3
R IR
35
3
4
R IM
36
3
3
IR IM
37
3
4
SBCX dst, src dst ← dst – src – C ER ER
38
****1* 4
3
ER IM
39
4
3
Flags notation:
* = Value is a function of the result of the operation.
– = Unaffected.
X = Undefined.
0 = Reset to 0.
1 = Set to 1.
PS025015-1212
PRELIMINARY
eZ8 CPU Instruction Set