Z8F1680SH020SG Datasheet, PDF (279/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
254
Bit
[4]
IRM
[3]
GCE
[2:1]
SLA[9:8]
[0]
DIAG
Description (Continued)
Interactive Receive Mode
Valid in SLAVE Mode when software needs to interpret each received byte before
acknowledging. This bit is useful for processing the data bytes following a General Call
Address or if software wants to disable hardware address recognition.
0 = Acknowledge occurs automatically and is determined by the value of the NAK bit of the
I2CCTL Register.
1 = A receive interrupt is generated for each byte received (address or data). The SCL is
held Low during the Acknowledge cycle until software writes to the I2CCTL Register.
The value written to the NAK bit of the I2CCTL Register is output on SDA. This value
allows software to Acknowledge or Not Acknowledge after interpreting the associated
address/data byte.
General Call Address Enable
Enables reception of messages beginning with the General Call Address or start byte.
0 = Do not accept a message with the General Call Address or start byte.
1 = Do accept a message with the General Call Address or start byte. When an address
match occurs, the GCA and RD bits in the I²C Status Register indicates whether the
address matched the General Call Address/start byte or not. Following the General Call
Address byte, the software can set the IRM bit that allows software to examine the
following data byte(s) before acknowledging.
Slave Address Bits 9 and 8
Initialize with the appropriate slave address value when using 10-bit slave addressing.
These bits are ignored when using 7-bit slave addressing.
Diagnostic Mode
Selects read back value of the Baud Rate Reload and State registers.
0 = Reading the Baud Rate registers returns the Baud Rate register values. Reading the
State register returns I²C controller state information.
1 = Reading the Baud Rate registers returns the current value of the baud rate counter.
Reading the State register returns additional state information.
PS025015-1212
PRELIMINARY
I2C Master/Slave Controller