Z8F1680SH020SG Datasheet, PDF (123/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
98
4. Write to the Timer High and Low Byte registers to set the starting count value (typi-
cally 0001H).
5. Write to the Timer Reload High and Low Byte registers to set the reload value.
6. Clear the Timer PWM High and Low Byte registers to 0000H. This allows user soft-
ware to determine if interrupts were generated by either a capture event or a reload. If
the PWM High and Low Byte registers still contain 0000H after the interrupt, then the
interrupt was generated by a Reload.
7. If required, enable the timer interrupt and set the timer interrupt priority by writing to
the relevant interrupt registers. By default, the timer interrupt will be generated for
both input capture and reload events. If required, configure the timer interrupt to be
generated only at the input capture event or the reload event by setting TICONFIG
field of the Timer Control 0 Register.
8. Configure the associated GPIO port pin for the Timer Input alternate function.
9. Write to the Timer Control 1 Register to enable the timer and initiate counting.
In CAPTURE Mode, the elapsed time from timer start to Capture event can be calculated
using the following equation:
Capture Elapsed Time
(s)
=
-^--C----a---p---t-u---r--e----V-----a--l--u---e---------S---t--a--r--t----V----a---l-u---e---^----^-----P---r--e---s--c---a--l--e-
Timer Clock Frequency (Hz)
9.2.3.9. CAPTURE RESTART Mode
In CAPTURE RESTART Mode, the current timer count value is recorded when the
appropriate external Timer Input transition occurs. The Capture count value is written to
the Timer PWM High and Low Byte registers. The Timer counts timer clocks up to the 16-
bit reload value. The TPOL bit in the Timer Control 1 Register determines if the Capture
occurs on a rising edge or a falling edge of the Timer Input signal. When the Capture event
occurs, an interrupt is generated and the count value in the Timer High and Low Byte
registers is reset to 0001H and counting resumes. The INPCAP bit in Timer Control 0
Register is set to indicate the timer interrupt is due to an input capture event.
If no Capture event occurs, the timer counts up to the 16-bit Compare value stored in the
Timer Reload High and Low Byte registers. Upon reaching the reload value, the timer
generates an interrupt, the count value in the Timer High and Low Byte registers is reset to
0001H and counting resumes. The INPCAP bit in Timer Control 0 Register is cleared to
indicate the timer interrupt is not due to an input capture event.
PS025015-1212
PRELIMINARY
Timers