Z8F1680SH020SG Datasheet, PDF(20/412 Page) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

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Z8F1680SH020SG Datasheet, PDF (20/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

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Z8 Encore! XPÂ® F1680 Series

Product Specification

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Table 59. Timer 0â2 PWM0 High Byte Register (TxPWM0H). . . . . . . . . . . . . . . . . 110

Table 60. Timer 0-2 PWM1 High Byte Register (TxPWM1H) . . . . . . . . . . . . . . . . . 111

Table 61. Timer 0â2 PWM1 Low Byte Register (TxPWM1L) . . . . . . . . . . . . . . . . . 111

Table 62. Timer 0â2 PWM0 Low Byte Register (TxPWM0L) . . . . . . . . . . . . . . . . . 111

Table 63. Timer 0â2 Control 0 Register (TxCTL0) . . . . . . . . . . . . . . . . . . . . . . . . . . 112

Table 64. Timer 0â2 Control 1 Register (TxCTL1) . . . . . . . . . . . . . . . . . . . . . . . . . . 113

Table 65. Timer 0â2 Control 2 Register (TxCTL2) . . . . . . . . . . . . . . . . . . . . . . . . . . 117

Table 66. Timer 0â2 Status Register (TxSTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

Table 67. Timer 0â2 Noise Filter Control Register (TxNFC) . . . . . . . . . . . . . . . . . . 119

Table 68. Timer Count Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

Table 69. Multi-Channel Timer Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129

Table 70. Multi-Channel Timer High and Low Byte Registers (MCTH, MCTL) . . . 130

Table 71. Multi-Channel Timer Reload High and Low Byte Registers ï

(MCTRH, MCTRL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

Table 72. Multi-Channel Timer Subaddress Register (MCTSA) . . . . . . . . . . . . . . . . 132

Table 73. Multi-Channel Timer Subregister x (MCTSRx). . . . . . . . . . . . . . . . . . . . . 132

Table 74. Multi-Channel Timer Control 0 Register (MCTCTL0) . . . . . . . . . . . . . . . 132

Table 75. Multi-Channel Timer Control 1 Register (MCTCTL1) . . . . . . . . . . . . . . . 134

Table 76. Multi-Channel Timer Channel Status 0 Register (MCTCHS0) . . . . . . . . . 135

Table 77. Multi-Channel Timer Channel Status 1 Register (MCTCHS1) . . . . . . . . . 136

Table 78. Multi-Channel Timer Channel Control Register (MCTCHyCTL). . . . . . . 137

Table 79. Multi-Channel Timer Channel-y High Byte Registers (MCTCHyH)* . . . 139

Table 80. Watchdog Timer Approximate Time-Out Delays . . . . . . . . . . . . . . . . . . . 141

Table 81. Watchdog Timer Reload High Byte Register (WDTH = FF2H) . . . . . . . . 143

Table 82. Watchdog Timer Reload Low Byte Register . . . . . . . . . . . . . . . . . . . . . . . 143

Table 83. LIN-UART Transmit Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163

Table 84. LIN-UART Receive Data Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164

Table 85. LIN-UART Status 0 RegisterâStandard UART Mode ï

(U0STAT0 = F41H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165

Table 86. LIN-UART Status 0 RegisterâLIN Mode (U0STAT0 = F41H) . . . . . . . 166

Table 87. LIN-UART Mode Select and Status Register (U0MDSTAT = F44H) . . . 168

PS025015-1212

PRELIMINARY

List of Tables

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