Z8F1680SH020SG Datasheet, PDF (72/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
47
7.2.
Architecture
Figure 9 displays a simplified block diagram of a GPIO port pin and does not illustrate the
ability to accommodate alternate functions and variable port current drive strength.
Port Input
Data Register
QD
Schmitt-Trigger
QD
Port Output
Data Register
DATA
Bus
DQ
System
Clock
System
Clock
Port Output Control
VDD
Port
Pin
Port Data Direction
Figure 9. GPIO Port Pin Block Diagram
GND
7.3. GPIO Alternate Functions
Many GPIO port pins are used for GPIO and to access the on-chip peripheral functions
like the timers and serial-communication devices. The Port A–E Alternate Function sub-
registers configure these pins for either GPIO or alternate function operation. When a pin
is configured for alternate function, control of port-pin direction (input/output) is passed
from Port A–E Data Direction registers to the alternate functions assigned to this pin.
Tables 17 through 19 list the alternate functions possible with each port pin for every
package. The alternate function associated at a pin is defined through alternate function
sets subregisters AFS1 and AFS2.
The crystal oscillator and the 32 kHz secondary oscillator functionalities are not controlled
by the GPIO block. When the crystal oscillator or the 32 kHz secondary oscillator is
enabled in the oscillator control block, the GPIO functionality of PA0 and PA1, or PA2 and
PA3, is overridden. In such a case, those pins function as input and output for the crystal
oscillator.
PS025015-1212
PRELIMINARY
General-Purpose Input/Output