Z8F1680SH020SG Datasheet, PDF (338/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
313
23.4.3. Line Control Register
The Line Control Register, shown in Table 166, is used to configure the output driver char-
acteristics during transmission. This register is only used in high-speed implementations.
Table 166. OCD Line Control Register (OCDLCR)
Bit
Field
Reset
R/W
7
6
Reset
00
R
5
NBTX
0
R/W
4
NBEN
0
R/W
3
TXFC
0
R/W
2
TXDH
0
R/W
1
TXD
0
R/W
0
TXHD
0
R/W
Bit
[7:6]
Reset
[5]
NBTX
[4]
NBEN
[3]
TXFC
[2]
TXDH
[1]
TXD
[0]
TXHD
Description
Reset
Nine Bit Transmit
This control bit sets the polarity of the ninth bit when nine bit mode is enabled.
0 = Ninth bit is zero.
1 = Ninth bit is one.
Nine Bit Enable
This control bit enables nine-bit mode; it is useful when transmit flow control using remote start
bit is enabled to detect valid characters.
0 = Nine Bit mode disabled.
1 = Nine Bit mode enabled.
Transmit Flow Control
0 = Transmit Flow Control disabled.
1 = Transmit Flow Control using remote start bit.
Transmit Drive High
0 = Pin is not driven High during 0 to 1 transitions.
1 = Pin is driven High during 0 to 1 transitions.
Transmit Drive
0 = Pin is only driven Low during transmission (Open-Drain).
1 = Pin is always driven during transmission.
Transmit High Drive Strength
0 = Pin output driver is Low drive strength.
1 = Pin output driver is High drive strength.
PS025015-1212
PRELIMINARY
On-Chip Debugger