Z8F1680SH020SG Datasheet, PDF (317/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
292
Bits
Field
Default
Value
the return from the subroutine, the read byte resides in working register R0 and the read
status byte resides in working register R1. The bit fields of this status byte are defined in
Table 160. Also, the user code should pop the address byte off the stack.
The read routine uses 16 bytes of stack space in addition to the 1 byte of address pushed by
you. Sufficient memory must be available for this stack usage. Because of the Flash mem-
ory architecture, NVDS reads exhibit a nonuniform execution time. A read operation takes
between 71 µs and 258 µs (assuming a 20 MHz system clock). Slower system clock speeds
result in proportionally higher execution times.
NVDS byte reads from invalid addresses (those exceeding the NVDS array size) return
0xff. Illegal read operations have a 6 µs execution time. The status byte returned by the
NVDS read routine is zero for successful read. If the status byte is nonzero, there is a
corrupted value in the NVDS array at the location being read. In this case, the value
returned in R0 is the byte most recently written to the array that does not have an error.
Table 160. Read Status Byte
7
6
5
Reserved
0
0
0
4
3
2
DE Reserved FE
0
0
0
1
IGADDR
0
0
Reserved
0
Bit
Description
[7:5]
Reserved; must be 0.
[4]
Data Error
DE
When reading a NVDS address, if an error is found in the latest data corresponding to the
NVDS address, this bit is set to 1. NVDS source code steps forward until it finds valid data at
this address.
[3]
Reserved; must be 0.
[2]
Flash Error
FE
If a Flash error is detected, this bit is set to 1.
[1]
IGADDR
Illegal Address
When NVDS byte reads occur from invalid addresses (those exceeding the NVDS array size),
this bit is set to 1.
Note: When the NVDS array size is 256 bytes, there is no address exceeding the size: therefore the 
IGADDR bit cannot be used.
[0]
Reserved; must be 0.
22.2.3. Power Failure Protection
The NVDS routines employ error checking mechanisms to ensure a power failure endan-
gers only the most recently written byte. Bytes previously written to the array are not per-
turbed. For this protection to function, the VBO must be enabled (see the Low-Power
PS025015-1212
PRELIMINARY
Nonvolatile Data Storage