Z8F1680SH020SG Datasheet, PDF (52/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
27
Table 8. Register File Address Map (Continued)
Address (Hex) Register Description
Mnemonic Reset (Hex)¹ Page #
Analog-to-Digital Converter (ADC)
F70
ADC Control 0
F71
ADC Raw Data High Byte
F72
ADC Data High Byte
F73
ADC Data Low Bits
F74
ADC Sample Settling Time
F75
Sample Time
F76
ADC Clock Prescale Register
F77–F7F
Reserved
ADCCTL0
00
189
ADCRD_H
80
191
ADCD_H
XX
191
ADCD_L
XX
192
ADCSST
FF
193
ADCST
XX
194
ADCCP
00
195
—
XX
Low-Power Control
F80
Power Control 0
F81
Reserved
PWRCTL0
80
44
—
XX
LED Controller
F82
LED Drive Enable
F83
LED Drive Level High Bit
F84
LED Drive Level Low Bit
F85
Reserved
LEDEN
00
66
LEDLVLH
00
67
LEDLVLL
00
67
—
XX
Oscillator Control
F86
Oscillator Control 0
F87
Oscillator Control 1
F88–F8F
Reserved
OSCCTL0
A0
319
OSCCTL1
00
320
Comparator 0
F90
Comparator 0 Control
CMP0
14
257
Comparator 1
F91
Comparator 1 Control
CMP1
14
258
F92–F9F
Reserved
—
XX
Notes:
1. XX=Undefined.
2. The Reserved space can be configured as General-Purpose Register File RAM depending on the user option bits
(see the User Option Bits chapter on page 277) and the on-chip PRAM size (see the Ordering Information chapter
on page 372). If the PRAM is programmed as General-Purpose Register File RAM on Reserved space, the start-
ing address always begins immediately after the end of General-Purpose Register File RAM.
PS025015-1212
PRELIMINARY
Register Map