Z8F1680SH020SG Datasheet, PDF (181/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
156
Wake-up message if it requires the master to initiate a LIN message frame. Following the
Wake-up message, the master wakes up and initiates a new message. A Wake-up message
is accomplished by pulling the bus Low for at least 250 µs but less than 5 ms. Transmit-
ting a 00H character is one way to transmit the Wake-up message.
If the CPU is in STOP Mode, the LIN-UART is not active and the Wake-up message must
be detected by a GPIO edge detect Stop Mode Recovery. The duration of the Stop Mode
Recovery sequence can preclude making an accurate measurement of the Wake-up mes-
sage duration.
If the CPU is in HALT or OPERATIONAL mode, the LIN-UART (if enabled) times the
duration of the Wake-up and provides an interrupt following the end of the break sequence
if the duration is ≥ 3 bit times. The total duration of the Wake-up message in bit times can
be obtained by reading the RxBreakLength field in the Mode Select and Status register.
After a Wake-up message has been detected, the LIN-UART can be placed (by software)
either into LIN Master or LIN Slave Wait for Break states as appropriate. If the break
duration exceeds 15 bit times, the RxBreakLength field contains the value Fh. If the LIN-
UART is disabled, Wake-up message is detected via a port pin interrupt and timed by soft-
ware. If the device is in STOP Mode, the High to Low transition on the port pin will bring
the device out of STOP Mode.
The LIN Sleep state is selected by software setting LinState[1:0] = 00. The decision to
move from an active state to sleep state is based on the LIN messages as interpreted by
software.
12.1.10.5. LIN Slave Operation
LIN SLAVE Mode is selected by setting LMST = 0, LSLV = 1, ABEN = 1 or 0 and
LinState[1:0] = 01b (Wait for Break state). The LIN slave detects the start of a new
message by the break which appears to the Slave as a break of at least 11 bit times in
duration. The LIN-UART detects the break and generates an interrupt to the CPU. The
duration of the break is observable in the RxBreakLength field of the Mode Select and
Status register. A break of less than 11 bit times in duration does not generate a break
interrupt when the LIN-UART is in Wait for Break state. If the break duration exceeds 15
bit times, the RxBreakLength field contains the value Fh.
Following the break, the LIN-UART hardware automatically transits to the Autobaud
state, where it autobauds by timing the duration of the first 8 bit times of the Synch
character as defined in the LIN standard. The duration of the autobaud period is measured
by the BRG Counter which will update every 8th system clock cycle between the start bit
and the beginning of bit 7 of the autobaud sequence. At the end of the autobaud period, the
duration measured by the BRG counter (auto baud period divided by 8) is automatically
transferred to the Baud Reload High and Low registers if the ABEN bit of the LIN control
register is set. If the BRG Counter overflows before reaching the start of bit 7 in the
autobaud sequence the Autobaud Overrun Error interrupt occurs, the OE bit in the Status 0
Register is set and the Baud Reload registers are not updated. To autobaud within 2% of
the master’s baud rate, the slave system clock must be a minimum of 100 times the baud
PS025015-1212
PRELIMINARY
LIN-UART