Z8F1680SH020SG Datasheet, PDF(22/412 Page) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

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Z8F1680SH020SG Datasheet, PDF (22/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

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Z8 Encore! XPÂ® F1680 Series

Product Specification

xxii

Table 118. I2C Master/Slave Controller Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224

Table 119. I2C Data Register (I2CDATA = F50H) . . . . . . . . . . . . . . . . . . . . . . . . . . . 244

Table 120. I2C Interrupt Status Register (I2CISTAT = F51H) . . . . . . . . . . . . . . . . . . 245

Table 121. I2C Control Register (I2CCTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247

Table 122. I2C Baud Rate High Byte Register (I2CBRH = 53H) . . . . . . . . . . . . . . . . 248

Table 123. I2C Baud Rate Low Byte Register (I2CBRL = F54H). . . . . . . . . . . . . . . . 249

Table 124. I2C State Register (I2CSTATE)âDescription when DIAG = 1 . . . . . . . . 250

Table 125. I2C State Register (I2CSTATE)âDescription when DIAG = 0 . . . . . . . . 251

Table 126. I2CSTATE_L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252

Table 127. I2CSTATE_H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252

Table 128. I2C Mode Register (I2C Mode = F56H) . . . . . . . . . . . . . . . . . . . . . . . . . . 253

Table 129. I2C Slave Address Register (I2CSLVAD = 57H) . . . . . . . . . . . . . . . . . . . 255

Table 130. Comparator 0 Control Register (CMP0). . . . . . . . . . . . . . . . . . . . . . . . . . . 257

Table 131. Comparator 1 Control Register (CMP1). . . . . . . . . . . . . . . . . . . . . . . . . . . 258

Table 132. Z8 Encore! XP F1680 Series Flash Memory Configurations. . . . . . . . . . . 262

Table 133. Flash Code Protection Using the Flash Option Bit. . . . . . . . . . . . . . . . . . . 268

Table 134. Flash Control Register (FCTL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 272

Table 135. Flash Status Register (FSTAT). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 272

Table 136. Flash Page Select Register (FPS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273

Table 137. Flash Sector Protect Register (FPROT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 274

Table 138. Flash Frequency High Byte Register (FFREQH) . . . . . . . . . . . . . . . . . . . . 275

Table 139. Flash Frequency Low Byte Register (FFREQL) . . . . . . . . . . . . . . . . . . . . 275

Table 140. Flash Option Bits at Program Memory Address 0000H. . . . . . . . . . . . . . . 278

Table 141. Flash Option Bits at Program Memory Address 0001H. . . . . . . . . . . . . . . 280

Table 142. Trim Bit Data Register (TRMDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281

Table 143. Trim Bit Address Register (TRMADR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 281

Table 144. Trim Bit Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281

Table 145. Trim Bit Address Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282

Table 146. Trim Option Bits at Address 0000H (TTEMP0) . . . . . . . . . . . . . . . . . . . . 282

Table 147. Trim Option Bits at 0001H (TTEMP1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 283

PS025015-1212

PRELIMINARY

List of Tables

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