Z8F1680SH020SG Datasheet, PDF (330/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
305
Table 163. On-Chip Debugger Commands (Continued)
Debug Command
Command
Byte
Enabled when
not in DEBUG
mode?
Disabled by Read Protect Option Bit
Write Test Mode Register
F0H
–
Flash Test mode is not be enabled if the
Information Area Write Protect option
bit is enabled.
Read Test Mode Register
F1H
–
–
Write Option Bit registers
F2H
–
Cannot write the Read Protect or
Information Area Write Protect option
bits.
Read Option Bit registers
F3H
–
–
Note: Unlisted command byte values are reserved.
In the following bulleted list of OCD Commands, data and commands sent from the host
to the On-Chip Debugger are identified by DBG ← Command/Data. Data returned from
the On-Chip Debugger to the host is identified by DBG → Data.
Read Revision (00H). The Read OCD Revision command determines the version of the
On-Chip Debugger. If OCD commands are added, removed or changed, this revision num-
ber changes.
DBG ← 00H
DBG → REVID[15:8] (Major revision number)
DBG → REVID[7:0] (Minor revision number)
Write OCD Counter Register (01H). The Write OCD Counter Register command writes
the data that follows to the OCDCNTR Register. If the device is not in DEBUG mode, the
data is discarded.
DBG ← 01H
DBG ← OCDCNTR[15:8]
DBG ← OCDCNTR[7:0]
Read OCD Status Register (02H). The Read OCD Status Register command reads the
OCDSTAT Register.
DBG ← 02H
DBG → OCDSTAT[7:0]
Read OCD Counter Register (03H). The OCD Counter Register can be used to count
system clock cycles in between breakpoints, generate a BRK when it counts down to 0, or
generate a BRK when its value matches the Program Counter. Because this register is
really a down counter, the returned value is inverted when this register is read so the
returned result appears to be an up counter. If the device is not in DEBUG mode, this com-
mand returns FFFFH.
PS025015-1212
PRELIMINARY
On-Chip Debugger