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Z8F1680SH020SG Datasheet, PDF (73/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers
Z8 Encore! XP® F1680 Series
Product Specification
48
7.4. Direct LED Drive
The Port C pins provide a current synchronized output capable of driving an LED without
requiring an external resistor. The output synchronizes current at programmable levels of
3 mA, 7 mA, 13 mA and 20 mA. This mode is enabled through the Alternate Function sub-
register AFS1 and is programmable through the LED control registers. For proper func-
tion, the LED anode must be connected to VDD and the cathode to the GPIO pin.
Using all Port C pins in LED drive mode with maximum current can result in excessive
total current. For the maximum total current for the applicable package, see the Electrical
Characteristics chapter on page 349.
7.5.
Shared Reset Pin
On all the devices, the Port D0 pin shares function with a bidirectional reset pin. Unlike all
other I/O pins, this pin does not default to GPIO pin on power-up. This pin acts as a bidi-
rectional input/open-drain output reset with an internal pull-up until user software recon-
figures it as GPIO PD0. The Port D0 pin is output-only when in GPIO Mode, and must be
configured as an output. PD0 supports the High Drive feature but not the Stop Mode
Recovery feature.
7.6.
Crystal Oscillator Override
For systems using the crystal oscillator, PA0 and PA1 is used to connect the crystal. When
the main crystal oscillator is enabled (see the Oscillator Control1 Register section on page
320), the GPIO settings are overridden and PA0 and PA1 is disabled.
7.7. 32kHz Secondary Oscillator Override
For systems using a 32 kHz secondary oscillator, PA2 and PA3 is used to connect a watch
crystal. When the 32 kHz secondary oscillator is enabled (see the Oscillator Control1 Reg-
ister section on page 320), the GPIO settings are overridden and PA2 and PA3 is disabled.
7.8.
5 V Tolerance
All GPIO pins, including those that share functionality with an ADC, crystal or compara-
tor signals are 5 V-tolerant and can handle inputs higher than VDD even with the pull-ups
enabled.
PS025015-1212
PRELIMINARY
General-Purpose Input/Output