Z8F1680SH020SG Datasheet, PDF (80/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
55
Table 19. Port Alternate Function Mapping, 40-/44-Pin Parts^1,2 (Continued)
Port
Pin Mnemonic
Alternate Function Description
Alternate
Function Set
Register AFS1
Port B PB0 Reserved
AFS1[0]: 0
ANA0/AMPOUT ADC Analog Input/LPO Output
AFS1[0]: 1
PB1 Reserved
AFS1[1]: 0
ANA1/AMPINN ADC Analog Input/LPO Input (N)
AFS1[1]: 1
PB2 Reserved
AFS1[2]: 0
ANA2/AMPINP
ADC Analog Input/LPO Input (P)
AFS1[2]: 1
PB3 CLKIN
External Clock Input
AFS1[3]: 0
ANA3
ADC Analog Input
AFS1[3]: 1
PB4 Reserved
AFS1[4]: 0
ANA7
ADC Analog Input
AFS1[4]: 1
PB5 Reserved
AFS1[5]: 0
VREF
Voltage Reference
AFS1[5]: 1
Notes:
1. Because there are at most two choices of alternate functions for some pins in Ports A–C, the Alternate Function
Set Register (AFS2) is implemented but not used to select the function. The alternate function selection must
also be enabled, as described in the Port A–E Alternate Function Subregisters section on page 61.
2. Because there is only one alternate function for each Port D and Port E pin, the Alternate Function Set registers
are not implemented for Ports D and E. Enabling the alternate function selections automatically enables the
associated alternate function, as described in the Port A–E Alternate Function Subregisters section on page 61.
3. This timer function is only available in the 44-pin package; its alternate functions are reserved in the 40-pin pack-
age.
PS025015-1212
PRELIMINARY
General-Purpose Input/Output