Z8F1680SH020SG Datasheet, PDF (112/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
87
If system clock is chosen as the clock source, the timer ceases to operate as a system clock
and is put into STOP Mode. In this case the registers are not reset and operation will
resume after Stop Mode Recovery occurs.
9.2.2.3. Power Reduction During Operation
Removal of the TEN bit will inhibit clocking of the entire timer block. The CPU can still
read/write registers when the enable bit(s) are taken out.
9.2.3. Timer Operating Modes
The timers can be configured to operate in the following modes, each of which is
described in this section where indicated in Table 52.
Table 52. Timer Operating Modes
Mode
TRIGGERED ONE-SHOT Mode
CONTINUOUS Mode
COUNTER Mode
COMPARATOR COUNTER Mode
PWM SINGLE OUTPUT Mode
PWM DUAL Output Mode
CAPTURE Mode
CAPTURE RESTART Mode
COMPARE Mode
GATED Mode
CAPTURE/COMPARE Mode
DEMODULATION Mode
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Number
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9.2.3.1. ONE-SHOT Mode
In ONE-SHOT Mode, the timer counts up to the 16-bit reload value stored in the Timer
Reload High and Low Byte registers. The Timer counts timer clocks up to the 16-bit
reload value. Upon reaching the reload value, the timer generates an interrupt, and the
count value in the Timer High and Low Byte registers is reset to 0001H. Then, the timer is
automatically disabled and stops counting.
Additionally, if the Timer Output alternate function is enabled, the Timer Output pin
changes state for one clock cycle (from Low to High or from High to Low) upon timer
reload. If it is appropriate to have the Timer Output make a permanent state change on
PS025015-1212
PRELIMINARY
Timers