Z8F1680SH020SG Datasheet, PDF (68/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
43
To minimize current in STOP Mode, all GPIO pins which are configured as digital inputs
must be driven to one of the supply rails (V_DD or GND). The device is brought out of
STOP Mode using Stop Mode Recovery. For more details about Stop Mode Recovery, see
the Reset, Stop Mode Recovery and Low-Voltage Detection chapter on page 31.
6.2. HALT Mode
Executing the eZ8 CPU’s HALT instruction places the device into HALT Mode. In HALT
Mode, the operating characteristics are:
• Primary oscillator is enabled and continues to operate
• System clock is enabled and continues to operate
• eZ8 CPU is stopped
• Program counter (PC) stops incrementing
• WDT’s internal RC oscillator continues to operate
• If enabled, the WDT continues to operate
• If enabled, the 32kHz secondary oscillator for Timers continues to operate
• All other on-chip peripherals continue to operate
The eZ8 CPU can be brought out of HALT Mode by any of the following operations:
• Interrupt
• Watchdog Timer time-out (Interrupt or Reset)
• Power-On Reset
• Voltage Brown-Out Reset
• External RESET pin assertion
To minimize current in HALT Mode, all GPIO pins which are configured as inputs must
be driven to one of the supply rails (V_DD or GND).
6.3.
Peripheral-Level Power Control
In addition to the STOP and HALT modes, it is possible to disable each peripheral on each
of the Z8 Encore! XP F1680 Series devices. Disabling a given peripheral minimizes its
power consumption.
PS025015-1212
PRELIMINARY
Low-Power Modes