Z8F1680SH020SG Datasheet, PDF (196/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
171
Bit
[2]
SBRK
[1]
STOP
[0]
LBEN
Description (Continued)
Send Break
This bit pauses or breaks data transmission. Sending a break interrupts any transmission in
progress, so ensure that the transmitter has completed sending data before setting this bit. In
standard UART mode, the duration of the break is determined by how long the software leaves
this bit asserted. Also the duration of any required stop bits following the break must be timed
by software before writing a new byte to be transmitted to the Transmit Data Register. In LIN
mode, the master sends a Break character by asserting SBRK. The duration of the break is
timed by hardware and the SBRK bit is deasserted by hardware when the Break is completed.
The duration of the Break is determined by the TxBreakLength field of the LIN Control
Register. One or two stop bits are automatically provided by the hardware in LIN mode as
defined by the stop bit.
0 = No break is sent.
1 = The output of the transmitter is 0.
Stop Bit Select
0 = The transmitter sends one stop bit.
1 = The transmitter sends two stop bits.
Loop Back Enable
0 = Normal operation.
1 = All transmitted data is looped back to the receiver within the IrDA module.
12.3.6. LIN-UART Control 1 Registers
Multiple registers, shown in Tables 90 and 91, are accessible by a single bus address. The
register selected is determined by the Mode Select (MSEL) field. These registers provide
additional control over LIN-UART operation.
PS025015-1212
PRELIMINARY
LIN-UART