Z8F1680SH020SG Datasheet, PDF (162/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
137
10.7.8. Multi-Channel Timer Channel-y Control Registers
Each channel has a control register to enable the channel, select the input/output polarity,
enable channel interrupts and select the channel mode of operation.
Table 78. Multi-Channel Timer Channel Control Register (MCTCHyCTL)¹
Bit
7
6
5
4
3
2
1
0
Field
CHEN CHPOL CHIEN CHUE Reserved
CHOP
Reset
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
Address
See note 2.
Notes:
1. y = A, B, C, D.
2. If 02H, 03H, 04H and 05H are in the Subaddress Register, they are accessible through Subregister 2.
Bit
[7]
CHEN
[6]
CHPOL
Description
Channel Enable
0 = Channel is disabled.
1 = Channel is enabled.
Channel Input/Output Polarity
Operation of this bit is a function of the current operating method of the channel.
ONE-SHOT Operation
When the channel is disabled, the Channel Output signal is set to the value of this bit. When
the channel is enabled, the Channel Output signal toggles for one system clock on reaching
the Channel Capture/Compare Register value.
CONTINUOUS COMPARE Operation
When the channel is disabled, the Channel Output signal is set to the value of this bit. When
the channel is enabled, the Channel Output signal toggles (from Low to High or High to Low)
on reaching the Channel Capture/Compare Register value.
PWM OUTPUT Operation
0 = Channel Output is forced Low when the channel is disabled. When enabled, the Channel
Output is forced High on Channel Capture/Compare Register value match and forced Low
on reaching the Timer Reload Register value (modulo mode) or counting down through the
channel Capture/Compare register value (count up/down mode).
1 = Channel Output is forced Low when the channel is disabled. When enabled, the Channel
Output is forced High on Channel Capture/Compare Register value match and forced Low
on reaching the Timer Reload Register value (modulo mode) or counting down through the
channel Capture/Compare register value (count up/down mode).
CAPTURE Operation
0 = Count is captured on the rising edge of the Channel Input signal.
1 = Count is captured on the falling edge of the Channel Input signal.
PS025015-1212
PRELIMINARY
Multi-Channel Timer