SH7020 Datasheet, PDF (57/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

Table 2.15 Shift Instructions
Instruction
ROTL Rn
ROTR Rn
ROTCL Rn
ROTCR Rn
SHAL Rn
SHAR Rn
SHLL Rn
SHLR Rn
SHLL2 Rn
SHLR2 Rn
SHLL8 Rn
SHLR8 Rn
SHLL16 Rn
SHLR16 Rn
Instruction Code
Operation
0100nnnn00000100 T ← Rn ← MSB
0100nnnn00000101 LSB → Rn → T
0100nnnn00100100 T ← Rn ← T
0100nnnn00100101 T → Rn → T
0100nnnn00100000 T ← Rn ← 0
0100nnnn00100001 MSB → Rn → T
0100nnnn00000000 T ← Rn ← 0
0100nnnn00000001 0 → Rn → T
0100nnnn00001000 Rn<<2 → Rn
0100nnnn00001001 Rn>>2 → Rn
0100nnnn00011000 Rn<<8 → Rn
0100nnnn00011001 Rn>>8 → Rn
0100nnnn00101000 Rn<<16 → Rn
0100nnnn00101001 Rn>>16 → Rn
Execution Cycles
1
1
1
1
1
1
1
1
1
1
1
1
1
1
T bit
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
—
—
—
—
—
—
Table 2.16 Branch Instructions
Instruction Instruction Code Operation
Executio
n Cycles T bit
BF label 10001011dddddddd If T = 0, disp×2 + PC → PC; if T = 1, nop 3/1*
—
BT label 10001001dddddddd If T = 1, disp×2 + PC → PC; if T = 0, nop 3/1*
—
BRA label 1010dddddddddddd Delayed branch, disp×2 + PC → PC
2
—
BSR label 1011dddddddddddd Delayed branch, PC → PR, disp×2 + PC 2
—
→ PC
JMP @Rm 0100mmmm00101011 Delayed branch, Rm → PC
2
—
JSR @Rm 0100mmmm00001011 Delayed branch, PC → PR, Rm → PC
2
—
RTS
0000000000001011 Delayed branch, PR → PC
2
—
Note: The execution state is three cycles when program branches, and one cycle when program
does not branch.
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