SH7020 Datasheet, PDF (198/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

• Bits 9 and 8 (priority mode bits 1 and 0 (PR1 and PR0)): PR1 and PR0 select the priority level
between channels when there are transfer requests for multiple channels simultaneously.
Bit 9: PR1
0
0
1
1
Bit 8: PR0
0
1
0
1
Description
Fixed priority order (Ch. 0 > Ch. 3 > Ch. 2 > Ch. 1) (initial value)
Fixed priority order (Ch. 1 > Ch. 3 > Ch. 2 > Ch. 0)
Round-robin mode priority order (the priority order immediately
after a reset is Ch. 0 > Ch. 3 > Ch. 2 > Ch. 1)
External-pin round-robin mode priority order (the priority order
immediately after a reset is Ch. 3 > Ch. 2 > Ch. 1 > Ch. 0)
• Bits 7–3 (reserved): These bits always read 0. The write value should always be 0.
• Bit 2 (address error flag bit (AE)): AE indicates that an address error occurred in the DMAC.
When this flag is set to 1, the channel cannot be enabled even if the DE bit in the DMA
channel control register (CHCR) and the DME bit are set to 1. To clear the AE bit, read 1 from
it and then write 0. It is initialized to 0 by a reset or the standby mode.
Bit 2: AE
0
1
Description
No DMAC address error (initial value)
To clear the AE bit, read 1 from it and then write 0.
Address error by DMAC
• Bit 1 (NMI Flag Bit (NMIF)): NMIF indicates that an NMI interrupt occurred. When this flag
is set to 1, the channel cannot be enabled even if the DE bit in the CHCR and the DME bit are
set to 1. To clear the NMIF bit, read 1 from it and then write 0. It is initialized to 0 by a reset or
the standby mode.
Bit 1: NMIF
0
1
Description
No NMI interrupt (initial value)
To clear the NMIF bit, read 1 from it and then write 0.
NMI has occurred
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