SH7020 Datasheet, PDF (200/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

Start
Initial settings
(SAR, DAR, TCR, CHCR, DMAOR)
DE, DME = 1 and
No
NMIF, AE, TE = 0?
Yes
Transfer request
No
occurs?*¹
Yes
Transfer (1 transfer unit); TCR–1
→ TCR, SAR and DAR updated
*²
Bus mode,
transfer request mode,
*^{3 DREQ detection selection}
system
TCR = 0?
No
Yes
DEI interrupt request
(when IE = 1)
Does
No NMIF = 1, AE = 1,
DE = 0, and DME
= 0?
Yes
Normal end Transfer ends
Does
NMIF = 1, AE = 1,
No
DE = 0, or DME
= 0?
Yes
Transfer aborted
Notes: 1.
2.
3.
In auto-request mode, transfer begins when NMIF, AE and TE are all and the DE
and DME bits are set to 1.
DREQ = level detection in the burst mode (external request), or cycle steal mode.
DREQ = edge detection in the burst mode (external request), or auto request mode
in burst mode.
Figure 9.2 DMA Transfer Flowchart
RENESAS 183