SH7020 Datasheet, PDF (229/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

Section 10 16-Bit Integrated-Timer Pulse Unit (ITU)
10.1 Overview
The SuperH microcomputer has an on-chip 16-bit integrated-timer pulse unit (ITU) with five
channels of 16-bit timers.
10.1.1 Features
ITU features are listed below:
• Can process a maximum of twelve different pulse outputs and ten different pulse inputs.
• Has ten general registers (GR), two per channel, that can be set to function independently as
output compare or input capture.
• Selection of eight counter input clock sources for all channels
 Internal clock: φ, φ/2, φ/4, φ/8,
 External clock: TCLKA, TCLKB, TCLKC, TCLKD
• All channels can be set for the following operating modes:
 Compare match waveform output: 0 output/1 output/selectable toggle output (0 output/1
output for channel 2).
 Input capture function: Selectable rising edge, falling edge, or both rising and falling edges.
 Counter clearing function: Counters can be cleared by a compare match or input capture.
 Synchronizing mode: Two or more timer counters (TCNT) can be written to
simultaneously. Two or more timer counters can be simultaneously cleared by a compare
match or input capture. Counter synchronization functions enable synchronized
input/output.
 PWM mode: PWM output can be provided with any duty cycle. When combined with the
counter synchronizing function, enables up to five-phase PWM output.
• Channel 2 can be set to the phase counting mode: Two-phase encoder output can be counted
automatically.
• Channels 3 and 4 can be set in the following modes:
 Reset-synchronized PWM mode: By combining channels 3 and 4, 3-phase PWM output is
possible with positive and negative waveforms .
 Complementary PWM mode: By combining channels 3 and 4, 3-phase PWM output is
possible with non-overlapping positive and negative waveforms.
• Buffer operation: Input capture registers can be double-buffered. Output compare registers can
be updated automatically.
• High-speed access via internal 16-bit bus: The TCNT, GR, and buffer register (BR) 16-bit
registers can be accessed at high speed via a 16-bit bus.
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