SH7020 Datasheet, PDF (186/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

Section 9 Direct Memory Access Controller (DMAC)
9.1 Overview
The SuperH microprocomputer chip includes a four-channel direct memory access controller
(DMAC). The DMAC can be used in place of the CPU to perform high speed transfers between
external devices that have DACK (transfer request acknowledge signal), external memory,
memory-mapped external devices, on-chip memory and on-chip peripheral modules (excluding
the DMAC itself). Using the DMAC reduces the burden on the CPU and increases overall
operating efficiency.
9.1.1 Features
The DMAC has the following features.
• Four channels
• Four Gbytes of address space on the architecture
• Byte or word selectable data transfer unit
• 65536 transfers (maximum)
• Single address mode transfers (channels 0 and 1): Either the transfer source or transfer
destination (peripheral device) is accessed by a DACK signal (selectable) while the other is
accessed by address. 1 transfer unit of data is transferred in each bus cycle.
Device combinations able to transfer:
 External devices with DACK and memory-mapped external devices (including external
memories)
 External devices with DACK and memory-mapped external memories
• Dual address mode transfer: (channels 0–3): Both the transfer source and transfer destination
are accessed by address. 1 transfer unit of data is transferred in 2 bus cycles.
Device combinations able to transfer:
 Two external memories
 External memory and memory-mapped external devices
 Two memory-mapped devices
 External memory and on-chip memory
 Memory-mapped external devices and on-chip peripheral module (excluding the DMAC
itself)
 External memory and on-chip memory
 Memory-mapped external device and on-chip peripheral module (excluding the DMAC)
 Two on-chip memories
 On-chip memory and on-chip peripheral modules (excluding DMAC)
RENESAS 169