SH7020 Datasheet, PDF (323/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

PCBR1:
Bit:
Bit name:
Initial value:
R/W:
15
PB15
MD1
0
R/W
14
PB15
MD0
0
R/W
13
PB14
MD1
0
R/W
12
PB14
MD0
0
R/W
11
PB13
MD1
0
R/W
10
PB13
MD0
0
R/W
9
PB12
MD1
0
R/W
8
PB12
MD0
0
R/W
Bit:
Bit name:
Initial value:
R/W:
7
PB11
MD1
0
R/W
6
PB11
MD0
0
R/W
5
PB10
MD1
0
R/W
4
3
2
1
0
PB10 PB9MD1 PB9MD0 PB8MD1 PB8MD0
MD0
0
0
0
0
0
R/W R/W R/W R/W R/W
PCBR2:
Bit: 15
14
13
12
11
10
9
8
Bit name: PB7MD1 PB7MD0 PB6MD1 PB6MD0 PB5MD1 PB5MD0 PB4MD1 PB4MD0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
Bit name: PB3MD1 PB3MD0 PB2MD1 PB2MD0 PB1MD1 PB1MD0 PB0MD1 PB0MD0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
11.2.2 Port B Data Register (PBDR)
The port B data register is a 16-bit read/write register that, when used for TPC output stores,
output data for groups 0–3. For details, see the port B description in section 16, I/O Ports.
Bit: 15
14
13
12
11
10
9
8
Bit name: PB15DR PB14DR PB13DR PB12DR PB11DR PB10DR PB9DR PB8DR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)* R/(W)*
Note: Bits set to TPC output by NDERA or NDERB are read-only.
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