SH7020 Datasheet, PDF (208/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

9.3.4 DMA Transfer Types
The DMAC supports the transfers shown in table 9.5. It can operate in the single address mode or
dual address mode, which are defined by how many bus cycles the DMAC takes to access the
transfer source and transfer destination. The actual transfer operation timing varies with the bus
mode. The DMAC has two bus modes: cycle-steal mode and burst mode.
Table 9.5 Supported DMA Transfers
Source
External
Device with
DACK
External device with DACK Not available
External memory
Single
Memory-mapped external Single
device
On-chip memory
Not available
On-chip peripheral module Not available
Single: Single address mode
Dual: Dual address mode
Destination
External
Memory
Memory-
Mapped
External On-Chip
Device Memory
Single Single Not available
Dual
Dual
Dual
Dual
Dual
Dual
Dual
Dual
Dual
Dual
Dual
Dual
On-Chip
Peripheral
Module
Not available
Dual
Dual
Dual
Dual
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