SH7020 Datasheet, PDF (132/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

Bit 12: PCHK1
0
1
Bit 11: PCHK0
0
1
0
1
Description
Parity not checked and not generated (initial value)
Parity checked and generated only in DRAM area
Parity checked and generated in DRAM area and area 2
Reserved
• Bits 10–0 (reserved): These bits always read as 0. The write value should always be 0.
8.2.11 Notes on Register Access
RCR, RTCSR, RTCNT, and RTCOR differ from other registers in being more difficult to write.
Data requires a password when it is written. This prevents data from being mistakenly overwritten
by program overruns and the like.
Writing to RCR, RTCSR, RTCNT, and RTCOR: Use only word transfer instructions. You
cannot write with byte transfer instructions. As figure 8.2 shows, when writing to RCR, place
H'5A in the upper byte and the write data in the lower byte. When writing to RTCSR, place H'A5
in the upper byte and the write data in the lower byte. When writing to RTCNT, place H'69 in the
upper byte and the write data in the lower byte. When writing to RTCOR, place H'96 in the upper
byte and the write data in the lower byte. These transfers write data in the lower byte to the
respective registers. If the upper byte differs from the above passwords, no writing occurs.
15
RCR
15
RTCSR
15
RTCNT
15
RTCOR
H'5A
H'A5
H'69
H'96
87
0
Write data
87
0
Write data
87
0
Write data
87
0
Write data
Figure 8.2 Writing to RCR, RTCSR, RTCNT, and RTCOR
Reading from RCR, RTCSR, RTCNT, and RTCORP: These registers are read like other
registers. They can be read by byte and word transfer instructions. If read by word transfer, the
value of the upper eight bits is H'00.
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