SH7020 Datasheet, PDF (31/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

Table 1.3 Pin Functions (cont)
Type
Symbol
Operating MD2,
mode
MD1,
control MD0
Pin No.
79–77
I/O Name and Function
I Mode select: Selects the operating mode. Do not
change these inputs while the chip is operating. The
following table lists the possible operating modes and
their corresponding MD2–MD0 values.
Operating
MD2 MD1 MD0 Mode
On-chip
ROM
Bus
Size in
Area 0
0 0 0 MCU mode Disabled 8 bits
00 1
16 bits
01 0
Enabled*¹
0 1 1 (Reserved)
10 0
10 1
11 0
1 1 1 PROM
mode*²
Interrupts NMI
74
I Nonmaskable interrupt: Nonmaskable interrupt request
signal. The rising or falling edge can be selected for
signal detection.
IRQ0–
IRQ7
65–68, I Interrupt request 0–7: Maskable interrupt request
97–100
signals. Level input or edge-triggered input can be
selected.
IRQOUT 61
O Slave interrupt request output: Indicates occurrence of
an interrupt while the bus is released.
Address A21–A0
bus
45–42, 40, O
39, 37–33,
31–25,
23–20
Address bus: Outputs addresses.
Data bus AD15–
AD0
19–16, 14, I/O Data bus: 16-bit bidirectional data bus that is
12-5, 3–1
multiplexed with the lower 16 bits of the address bus.
DPH
64
I/O Upper data bus parity: Parity data for D15–D8.
DPL
62
I/O Lower data bus parity: Parity data for D7–D0.
Bus
WAIT
54
control
I Wait: Requests the insertion of wait states (T_W) into
the bus cycle when the external address space is
accessed.
Notes : 1.Use prohibited in the SH7020 Romless version.
2.Can only be used in the SH7021 ZTAT version.
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