SH7020 Datasheet, PDF (415/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

14.2 Register Configuration
Table 14.2 summarizes the registers of the pin function controller.
Table 14.2 Pin Function Controller Registers
Name
Port A I/O register
Port A control register 1
Port A control register 2
Port B I/O register
Port B control register 1
Port B control register 2
Column address strobe
pin control register
Abbreviation R/W
PAIOR
R/W
PACR1
R/W
PACR2
R/W
PBIOR
R/W
PBCR1
R/W
PBCR2
R/W
CASCR
R/W
Initial Value
H'0000
H'3302
H'FF95
H'0000
H'0000
H'0000
H'5FFF
Address
H'5FFFFC4
H'5FFFFC8
H'5FFFFCA
H'5FFFFC6
H'5FFFFCC
H'5FFFFCE
H'5FFFFEE
Access Size
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
14.3 Register Descriptions
14.3.1 Port A I/O Register (PAIOR)
The port A I/O register (PAIOR) is a 16-bit read/write register that selects input or output for
individual pins on a bit-by-bit basis. Bits PA15IOR–PA0IOR correspond to pins
PA15/IRQ3/DREQ1–PA0/CS4/TIOCA0. PAIOR is enabled when the port A pins function as
input/outputs (PA15–PA0) and for ITU input capture and output compare (TIOCA1, TIOCA0,
TIOCB1, and TIOCB0). For other functions, they are disabled. For port A pin functions PA15–
PA0 and TIOCA1, TIOCA0, TIOCB1, and TIOCB0, a given pin in port A is an output pin if its
corresponding PAIOR bit is set to 1, and an input pin if the bit is cleared to 0.
PAIOR is initialized to H'0000 by power-on resets; however, it is not initialized for manual resets,
standby mode, or sleep mode.
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