SH7020 Datasheet, PDF (384/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

Start of initialization
Clear TE and RE bits to 0 in SCR
Select communication format in SMR (1)
Set value in BRR
(2)
Set CKE1 and CKE0 bits in SCR
(leaving TE and RE cleared to 0) ⁽³⁾
Wait
No
1-bit interval elapsed?
Yes
Set TE or RE to 1 in SCR; Set RIE,
TIE, TEIE, and MPIE as necessary ⁽⁴⁾
End
Note: Circled numbers refer to the preceding procedure.
Figure 13.4 Sample Flowchart for SCI Initialization
Transmitting Serial Data (asynchronous mode): Figure 13.5 shows a sample flowchart for
transmitting serial data. The procedure for transmitting serial data is as follows:
1. SCI initialization: select the TxD pin function with the PFC.
2. SCI status check and transmit data write: read the serial status register (SSR), check that the
TDRE bit is 1, then write transmit data in the transmit data register (TDR) and clear TDRE to
0.
3. To continue transmitting serial data: read the TDRE bit to check whether it is safe to write (1);
if so, write data in TDR, then clear TDRE to 0. When the DMAC is started by a transmit-data-
empty interrupt request (TXI) to write data in TDR, the TDRE bit is checked and cleared
automatically.
4. To output a break signal at the end of serial transmission: set the DR bit to 0 (I/O data port
register), then clear TE to 0 in SCR and set the TxD pin function as output port with the PFC.
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