SH7020 Datasheet, PDF (48/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

Table 2.9 Instruction Formats (cont)
Instruction Formats
nmd format
15
0
xxxx nnnn mmmm dddd
d format
15
xxxx
xxxx
0
dddd dddd
d12 format
15
xxxx dddd
dddd
0
dddd
nd8 format
15
xxxx nnnn
dddd
0
dddd
i format
15
0
xxxx xxxx i i i i i i i i
ni format
15
0
xxxx nnnn i i i i i i i i
Source
Operand
mmmm: Direct
register
mmmmdddd:
Indirect register
with
displacement
dddddddd:
Indirect GBR
with
displacement
R0(Direct
register)
dddddddd: PC
relative with
displacement
dddddddd: PC
relative
dddddddddddd:
PC relative
dddddddd: PC
relative with
displacement
iiiiiiii: Immediate
iiiiiiii: Immediate
iiiiiiii: Immediate
iiiiiiii: Immediate
Destination
Operand
Example
nnnndddd: Indirect MOV.L
register with
Rm,@(disp,Rn)
displacement
nnnn: Direct
register
MOV.L
@(disp,Rm),Rn
R0 (Direct register) MOV.L
@(disp,GBR),R0
dddddddd: Indirect MOV.L
GBR with
R0,@(disp,GBR)
displacement
R0 (Direct register) MOVA
@(disp,PC),R0
—
BF
disp
—
BRA disp
nnnn: Direct
register
MOV.L
@(disp,PC),Rn
Indirect indexed
GBR
AND.B
#imm,@(R0,GBR)
R0 (Direct register) AND #imm,R0
—
nnnn: Direct
register
TRAPA #imm
ADD #imm,Rn
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