SH7020 Datasheet, PDF (139/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

Logical address space
H'8000000
H'8003FFF(SH7020)
H'8007FFF(SH7021) ^H'0000000
H'8004000(SH7020) ^H'0003FFF
H'8008000(SH7021)
(SH7020)
H'0007FFF
(SH7021)
Shadow
Shadow
Shadow
H'004000
(SH7020)
H'0008000
(SH7021)
H'8FFC000
(SH7020)
H'8FF8000
(SH7021) ^H'0FFC000
(SH7020)
H'0FF8000
(SH7021)
H'0FFFFFF
Shadow
Shadow
Shadow
32-bit space 32-bit space
Logical address space
H'8000000
H'0000000
H'83FFFFF
H'8400000
H'03FFFFF
H'0400000
Shadow
H'87FFFFF
Actual space
On-chip ROM
SH7020:
H'8800000
H'07FFFFF
H'0800000
16 kbyte
SH7021:
32 kbyte
H'8BFFFFF
H'8C00000
• Valid
addresses
A15–A0
H'0BFFFFF
H'0C00000
(A23–A16
ignored)
H'8FFFFFF
• CS0 not
valid
H'0FFFFFF
8 or 16
bit space
Shadow
Shadow
Shadow
8 or 16
bit space
Actual space
External
memory
space
(4 Mbytes)
• MD2–MD0 =
000: 8-bit
access,
001: 16-bit
access
• Valid
addresses
A21–A0
(A23 and
A22 not
output)
• CS0 valid
• Long wait
function
MD2–MD0 = 010
MD2–MD0 = 000 or 001
Note: The bus width of area 0 is determined by the MD2–MD0 pins regardless of the A27 bit
setting.
Figure 85 Memory Map of Area 0
Area 1: Area 1 is the area where addresses A26–A24 are 001 and its address range is H'1000000–
H'1FFFFFF and H'9000000–H'9FFFFFF. Figure 8.6 is a memory map of area 1.
Area 1 can be set for use as DRAM space or external memory space with the DRAM enable bit
(DRAME) of the bus control register (BCR). When the DRAME bit is 0, it is external memory
space; when DRAME is 1, it is DRAM space.
In external memory space, the bus width is 8 bits when the A27 bit is 0 and 16 bits when it is 1.
Bits A23 and A22 are not output and the shadow is in 4-Mbyte units. When external memory is
accessed, the CS1 signal is valid.
DRAM space is a type of external memory space, but it is configured especially to be connected to
DRAM so it outputs strobe signals required for this purpose. Its bus width is 8 bits when it is 0 and
16 bits when it is 1. When the multiplex enable bit (MXE) of the DRAM control register (DCR) is
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