SH7020 Datasheet, PDF (143/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

In area 6, the space when A27 is 0 is allocated to address/data multiplexed I/O space when the
multiplexed I/O enable bit (IOE) of the bus control register (BCR) is 1 and external memory space
when the IOE bit is 0. When A27 is 1, it is always external memory space.
The multiplexed I/O space is a type of external memory space but the address and data are
multiplexed and output from AD15–AD0 or AD7–AD0. The bus width is 8 bits when the A14 bit
is 0 and 16 bits when the A14 bit is 1. The A23 and A22 bits are not output and the shadow is in 4-
Mbyte units. When multiplexed I/O space is accessed, the CS6 signal is valid.
In external memory space, the bus width is 8 bits when both the A27 and A14 bits are 0 and 16
bits when the A27 bit is 0 and the A14 bit is 1. When the A27 bit is 1, it is always a 16-bit space.
The A23 and A22 bits are not output and the shadow is in 4-Mbyte units. When external memory
is accessed, the CS6 signal is valid. The external memory space has a long wait function so
between 1 and 4 states can be selected for the number of long waits inserted into the bus cycle
using the area 6 long wait insertion bits (A6LW1 and A6LW0) of WCR3.
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