SH7020 Datasheet, PDF (205/509 Pages) Renesas Technology Corp – SuperH™ RISC engine

1. Transfer requests are generated simultaneously to channels 1 and 0.
2. Channel 0 has a higher priority, so the channel 0 transfer begins first (channel 1 waits for
transfer).
3. A channel 3 transfer request occurs during the channel 0 transfer (channels 1 and 3 are both
waiting)
4. When the channel 0 transfer ends, channel 0 becomes lowest priority.
5. At this point, channel 3 has a higher priority than channel 1, so the channel 3 transfer begins
(channel 1 waits for transfer).
6. When the channel 3 transfer ends, channel 3 becomes lowest priority.
7. The channel 1 transfer begins.
8. When the channel 1 transfer ends, channels 1 and 2 shift downward in priority so that channel
1 becomes the lowest priority.
Transfer request Waiting channel(s) DMAC operation
(1) Channels 0 and 1
(2) Channel 0
transfer starts
1
(3) Channel 3
Channel priority
0>3>2>1
Priority order
(4) Channel 0
changes
1, 3
transfer ends
3>2>1>0
1
None
(5) Channel 3
transfer starts
(6) Channel 3
transfer ends
Priority order
changes
(7) Channel 1
transfer starts
Priority order
(8) Channel 1
changes
transfer ends
2>1>0>3
0>3>2>1
Figure 9.4 Changes in Channel Priority in Round-Robin Mode
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