SH7125_08 Datasheet, PDF (99/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 5 Exception Handling
5.4 Interrupts
5.4.1 Interrupt Sources
Table 5.7 shows the sources that start the interrupt exception handling. They are NMI, user break,
IRQ, and on-chip peripheral modules.
Table 5.7 Interrupt Sources
Type
NMI
User break
IRQ
On-chip peripheral module
Request Source
NMI pin (external input)
User break controller (UBC)
IRQ0 to IRQ3 pins (external input)
Multi-function timer pulse unit 2 (MTU2)
Watchdog timer (WDT)
A/D converter (A/D_0 and A/D_1)
Compare match timer (CMT_0 and CMT_1)
Serial communication interface (SCI_0, SCI_1,
and SCI_2)
Port output enable (POE)
Number of
Sources
1
1
4 (SH7125)
3 (SH7124)
28
1
2
2
12
2
All interrupt sources are given different vector numbers and vector table address offsets. For
details on vector numbers and vector table address offsets, see table 6.3 in section 6, Interrupt
Controller (INTC).
Rev. 4.00 Jul. 25, 2008 Page 79 of 750
REJ09B0243-0400