SH7125_08 Datasheet, PDF (519/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 13 A/D Converter (ADC)
13.7 Usage Notes
13.7.1 Module Standby Mode Setting
Operation of the A/D converter can be disabled or enabled using the standby control register. The
initial setting is for operation of the A/D converter to be halted. Register access is enabled by
clearing module standby mode. For details, refer to section 19, Power-Down Modes.
13.7.2 Permissible Signal Source Impedance
This LSI's analog input is designed such that conversion accuracy is guaranteed for an input signal
for which the signal source impedance is 1 kΩ or less. This specification is provided to enable the
A/D converter's sample-and-hold circuit input capacitance to be charged within the sampling time;
if the sensor output impedance exceeds 1 kΩ, charging may be insufficient and it may not be
possible to guarantee A/D conversion accuracy. However, for A/D conversion in single mode with
a large capacitance provided externally, the input load will essentially comprise only the internal
input resistance of 10 kΩ, and the signal source impedance is ignored. However, as a low-pass
filter effect is obtained in this case, it may not be possible to follow an analog signal with a large
differential coefficient (e.g., 5 mV/µs or greater) (see figure 13.7). When converting a high-speed
analog signal or converting in scan mode, a low-impedance buffer should be inserted.
13.7.3 Influences on Absolute Accuracy
Adding capacitance results in coupling with GND, and therefore noise in GND may adversely
affect absolute precision. Be sure to make the connection to an electrically stable GND such as
AVss.
Care is also required to insure that filter circuits do not interfere in the accuracy by the printed
circuit digital signals on the mounting board (i.e, acting as antennas).
Rev. 4.00 Jul. 25, 2008 Page 499 of 750
REJ09B0243-0400