SH7125_08 Datasheet, PDF (415/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 10 Port Output Enable (POE)
Initial
Bit
Bit Name
value R/W Description
13
MTU2P2CZE 1
R/W* MTU2 Port 2 Output Comparison/High-Impedance
Enable
This bit specifies whether to compare output levels for
the MTU2 high-current PE12/TIOC4A and
PE14/TIOC4C pins and to place them in high-
impedance state when the OSF1 bit is set to 1 while
the OEC1 bit is 1 or when any one of the POE0F,
POE1F, POE3F, and MTU2CH34HIZ bits is set to 1.
0: Does not compare output levels or place the pins in
high-impedance state
1: Compares output levels and places the pins in
high-impedance state
12
MTU2P3CZE 1
R/W* MTU2 Port 3 Output Comparison/High-Impedance
Enable
This bit specifies whether to compare output levels for
the MTU2 high-current PE13/TIOC4B and
PE15/TIOC4D pins and to place them in high-
impedance state when the OSF1 bit is set to 1 while
the OEC1 bit is 1 or when any one of the POE0F,
POE1F, POE3F, and MTU2CH34HIZ bits is set to 1.
0: Does not compare output levels or place the pins in
high-impedance state
1: Compares output levels and places the pins in
high-impedance state
11
—
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
10 to 8 
All 1
R/W* Reserved
These bits are always read as 1. The write value
should always be 1.
7 to 0 —
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Note: * Can be modified only once after a power-on reset.
Rev. 4.00 Jul. 25, 2008 Page 395 of 750
REJ09B0243-0400