SH7125_08 Datasheet, PDF (17/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 14 Compare Match Timer (CMT) ........................................................503
14.1 Features.............................................................................................................................. 503
14.2 Register Descriptions ......................................................................................................... 504
14.2.1 Compare Match Timer Start Register (CMSTR) .................................................. 505
14.2.2 Compare Match Timer Control/Status Register (CMCSR) .................................. 505
14.2.3 Compare Match Counter (CMCNT) ..................................................................... 507
14.2.4 Compare Match Constant Register (CMCOR) ..................................................... 507
14.3 Operation ........................................................................................................................... 508
14.3.1 Interval Count Operation ...................................................................................... 508
14.3.2 CMCNT Count Timing......................................................................................... 508
14.4 Interrupts............................................................................................................................ 509
14.4.1 CMT Interrupt Sources ......................................................................................... 509
14.4.2 Timing of Setting Compare Match Flag ............................................................... 509
14.4.3 Timing of Clearing Compare Match Flag............................................................. 509
14.5 Usage Notes ....................................................................................................................... 510
14.5.1 Module Standby Mode Setting ............................................................................. 510
14.5.2 Conflict between Write and Compare-Match Processes of CMCNT ................... 510
14.5.3 Conflict between Word-Write and Count-Up Processes of CMCNT ................... 511
14.5.4 Conflict between Byte-Write and Count-Up Processes of CMCNT..................... 512
14.5.5 Compare Match between CMCNT and CMCOR ................................................. 512
Section 15 Pin Function Controller (PFC).........................................................513
15.1 Register Descriptions ......................................................................................................... 521
15.1.1 Port A I/O Register L (PAIORL).......................................................................... 522
15.1.2 Port A Control Registers L1 to L4 (PACRL1 to PACRL4).................................. 522
15.1.3 Port B I/O Registers L and H (PBIORL and PBIORH)........................................ 533
15.1.4 Port B Control Registers L1, L2, and H1 (PBCRL1, PBCRL2, and PBCRH1) ... 534
15.1.5 Port E I/O Register L (PEIORL)........................................................................... 539
15.1.6 Port E Control Registers L1 to L4 (PECRL1 to PECRL4) ................................... 539
15.1.7 IRQOUT Function Control Register (IFCR) ........................................................ 549
15.2 Usage Notes ....................................................................................................................... 550
Section 16 I/O Ports...........................................................................................551
16.1 Port A................................................................................................................................. 552
16.1.1 Register Descriptions............................................................................................ 553
16.1.2 Port A Data Register L (PADRL)......................................................................... 553
16.1.3 Port A Port Register L (PAPRL) .......................................................................... 557
16.2 Port B ................................................................................................................................. 559
16.2.1 Register Descriptions............................................................................................ 559
Rev. 4.00 Jul. 25, 2008 Page xvii of xx