SH7125_08 Datasheet, PDF (406/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 10 Port Output Enable (POE)
Bit Bit Name
13
POE1F
12
POE0F
11 to 9 
Initial
value R/W
Description
0
R/(W)*¹ POE1 Flag
This flag indicates that a high impedance request has
been input to the POE1 pin.
[Clearing conditions]
• By writing 0 to POE1F after reading POE1F = 1
(when the falling edge is selected by bits 3 and 2 in
ICSR1)
• By writing 0 to POE1F after reading POE1F = 1 after
a high level input to POE1 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 3 and 2 in ICSR1)
[Setting condition]
• When the input set by ICSR1 bits 3 and 2 occurs at
the POE1 pin
0
R/(W)*¹ POE0 Flag
This flag indicates that a high impedance request has
been input to the POE0 pin.
[Clearing conditions]
• By writing 0 to POE0F after reading POE0F = 1
(when the falling edge is selected by bits 1 and 0 in
ICSR1)
• By writing 0 to POE0F after reading POE0F = 1 after
a high level input to POE0 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 1 and 0 in ICSR1)
[Setting condition]
• When the input set by ICSR1 bits 1 and 0 occurs at
the POE0 pin
All 0 R
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 4.00 Jul. 25, 2008 Page 386 of 750
REJ09B0243-0400