SH7125_08 Datasheet, PDF (105/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Types
Illegal slot instruction
General illegal instruction
Stack State
Section 5 Exception Handling
SP →
Address of
delayed branch instruction
SR
32 bits
32 bits
SP →
Address of
general illegal instruction
SR
32 bits
32 bits
Rev. 4.00 Jul. 25, 2008 Page 85 of 750
REJ09B0243-0400