SH7125_08 Datasheet, PDF (178/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Multi-Function Timer Pulse Unit 2 (MTU2)
9.3 Register Descriptions
The MTU2 has the following registers. For details on register addresses and register states during
each process, see section 20, List of Registers. To distinguish registers in each channel, an
underscore and the channel number are added as a suffix to the register name; TCR for channel 0
is expressed as TCR_0.
Table 9.3 Register Configuration
Register Name
Abbrevia-
tion
R/W Initial value Address
Access Size
Timer control register_3
TCR_3
R/W H'00
H'FFFFC200 8, 16, 32
Timer control register_4
TCR_4
R/W H'00
H'FFFFC201 8
Timer mode register_3
TMDR_3 R/W H'00
H'FFFFC202 8, 16
Timer mode register_4
TMDR_4 R/W H'00
H'FFFFC203 8
Timer I/O control register H_3 TIORH_3 R/W H'00
H'FFFFC204 8, 16, 32
Timer I/O control register L_3 TIORL_3 R/W H'00
H'FFFFC205 8
Timer I/O control register H_4 TIORH_4 R/W H'00
H'FFFFC206 8, 16
Timer I/O control register L_4 TIORL_4 R/W H'00
H'FFFFC207 8
Timer interrupt enable
register_3
TIER_3
R/W H'00
H'FFFFC208 8, 16
Timer interrupt enable
register_4
TIER_4
R/W H'00
H'FFFFC209 8
Timer output master enable
register
TOER
R/W H'C0
H'FFFFC20A 8
Timer gate control register
TGCR
R/W H'80
H'FFFFC20D 8
Timer output control register 1 TOCR1
R/W H'00
H'FFFFC20E 8, 16
Timer output control register 2 TOCR2
R/W H'00
H'FFFFC20F 8
Timer counter_3
TCNT_3 R/W H'0000
H'FFFFC210 16, 32
Timer counter_4
TCNT_4 R/W H'0000
H'FFFFC212 16
Timer cycle data register
TCDR
R/W H'FFFF
H'FFFFC214 16, 32
Timer dead time data register TDDR
R/W H'FFFF
H'FFFFC216 16
Timer general register A_3
TGRA_3 R/W H'FFFF
H'FFFFC218 16, 32
Timer general register B_3
TGRB_3 R/W H'FFFF
H'FFFFC21A 16
Timer general register A_4
TGRA_4 R/W H'FFFF
H'FFFFC21C 16, 32
Timer general register B_4
TGRB_4 R/W H'FFFF
H'FFFFC21E 16
Rev. 4.00 Jul. 25, 2008 Page 158 of 750
REJ09B0243-0400