SH7125_08 Datasheet, PDF (474/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 12 Serial Communication Interface (SCI)
Figure 12.7 shows an example of the operation for reception.
Start
1 bit
Data
Parity Stop Start
bit bit bit
Data
Parity Stop
bit bit
Serial
data
0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1 1
0/1
RDRF
FER
RXI interrupt
request
One frame
Data read and RDRF flag
cleared to 0 by RXI
interrupt handler
ERI interrupt request
generated by framing
error
Figure 12.7 Example of SCI Receive Operation
(8-Bit Data, Parity, One Stop Bit)
12.4.3 Clock Synchronous Mode (Channel 1 in the SH7124 is not Available)
In clock synchronous mode, the SCIF transmits and receives data in synchronization with clock
pulses. This mode is suitable for high-speed serial communication.
The SCI transmitter and receiver are independent, so full-duplex communication is possible while
sharing the same clock. Both the transmitter and receiver have a double-buffered structure so that
data can be read or written during transmission or reception, enabling continuous data transfer.
Figure 12.8 shows the general format in clock synchronous serial communication.
*
Synchronization
clock
Serial data
One unit of transfer data (character or frame)
*
LSB
MSB
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
Don't care
Note: * High level except in continuous transfer
Don't care
Figure 12.8 Data Format in Clock Synchronous Communication
Rev. 4.00 Jul. 25, 2008 Page 454 of 750
REJ09B0243-0400