SH7125_08 Datasheet, PDF (637/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 17 Flash Memory
parameter FPFR. Since the unit is 128 bytes, the lower eight bits (MOA7 to MOA0)
must be in the 128-byte boundary of H'00 or H'80.
• FMPDR setting
If the storage destination of the program data is flash memory, even when the program
execution routine is executed, programming is not executed and an error is returned to
the FPFR parameter. In this case, the program data must be transferred to on-chip RAM
and then programming must be executed.
(2.11) Programming
There is an entry point of the programming program in the area from (download start address
set by FTDAR) + 16 bytes of on-chip RAM. The subroutine is called and programming is
executed by using the following steps.
MOV.L #DLTOP+16,R1
JSR @R1
NOP
; Set entry address to R1
; Call programming routine
 The general registers other than R0 are saved in the programming program.
 R0 is a return value of the FPFR parameter.
 Since the stack area is used in the programming program, a stack area of maximum 128
bytes must be reserved in RAM.
(2.12) The return value in the programming program, FPFR (general register R0) is checked.
(2.13) Determine whether programming of the necessary data has finished.
If more than 128 bytes of data are to be programmed, specify FMPAR and FMPDR in 128-
byte units, and repeat steps (2.10) to (2.13). Increment the programming destination address by
128 bytes and update the programming data pointer correctly. If an address which has already
been programmed is written to again, not only will a programming error occur, but also flash
memory will be damaged.
(2.14) After programming finishes, clear FKEY and specify software protection.
If this LSI is restarted by a power-on reset immediately after user MAT programming has
finished, secure a reset period (period of RES = 0) that is at least as long as the normal 100 µs.
Rev. 4.00 Jul. 25, 2008 Page 617 of 750
REJ09B0243-0400