SH7125_08 Datasheet, PDF (118/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Interrupt Controller (INTC)
Initial
Bit
Bit Name Value
R/W Description
2
IRQ2F 0
R/W Indicates the status of an IRQ2 interrupt request.
• When level detection mode is selected
0: An IRQ2 interrupt has not been detected
[Clearing condition]
Driving pin IRQ2 high
1: An IRQ2 interrupt has been detected
[Setting condition]
Driving pin IRQ2 low
• When edge detection mode is selected
0: An IRQ2 interrupt has not been detected
[Clearing conditions]
 Writing 0 after reading IRQ2F = 1
 Accepting an IRQ2 interrupt
1: An IRQ2 interrupt request has been detected
[Setting condition]
Detecting the specified edge of pin IRQ2
1
IRQ1F 0
R/W Indicates the status of an IRQ1 interrupt request.
• When level detection mode is selected
0: An IRQ1 interrupt has not been detected
[Clearing condition]
Driving pin IRQ1 high
1: An IRQ1 interrupt has been detected
[Setting condition]
Driving pin IRQ1 low
• When edge detection mode is selected
0: An IRQ1 interrupt has not been detected
[Clearing conditions]
 Writing 0 after reading IRQ1F = 1
 Accepting an IRQ1 interrupt
1: An IRQ1 interrupt request has been detected
[Setting condition]
Detecting the specified edge of pin IRQ1
Rev. 4.00 Jul. 25, 2008 Page 98 of 750
REJ09B0243-0400