SH7125_08 Datasheet, PDF (470/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 12 Serial Communication Interface (SCI)
Figure 12.5 shows an example of the operation for transmission.
1
Serial
data
Start
bit
Data
Parity Stop Start
bit bit bit
Data
Parity Stop
bit bit
0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1 1
1
Idle state
(mark state)
TDRE
TEND
TXI interrupt
TXI interrupt
request
request
Data written to SCTDR
and TDRE flag cleared to 0
by TXI interrupt handler
One frame
TEI interrupt
request
Figure 12.5 Example of Transmission in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit)
Rev. 4.00 Jul. 25, 2008 Page 450 of 750
REJ09B0243-0400