SH7125_08 Datasheet, PDF (732/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 21 Electrical Characteristics
21.3.1 Clock Timing
Table 21.5 Clock Timing
Conditions: V_CC = AV_CC = 4.0 V to 5.5 V, V_SS = PLLV_SS = AV_SS = 0 V,
T_a = –20 to +85°C (consumer specifications),
T_a = –40 to +85°C (industrial specifications)
Item
Symbol Min.
Reference
Max. Unit Figure
EXTAL clock input frequency
EXTAL clock input cycle time
EXTAL clock input low pulse width
EXTAL clock input high pulse width
EXTAL clock input rising time
EXTAL clock input falling time
CK (Bφ) clock frequency (reference
values)
f_EX
10
t
80
EXcyc
t
20
EXL
t
20
EXH
t_EXr

t
EXf

f_OP
10
12.5 MHz Figure 21.1
100 ns
 ns
 ns
5
ns
5
ns
40 MHz *
CK (Bφ) clock cycle time (reference
t_cyc
25
values)
100 ns
Power-on oscillation stabilization time t
10
OSC1
Oscillation stabilization time on return t
10
OSC2
from standby 1
 ms Figure 21.2
 ms Figure 21.3
Oscillation stabilization time on return
t_OSC3
10
from standby 2
 ms Figure 21.4
Note: * Depends on the frequency control register (FRQCR).
EXTAL
(input)
1/2 V_CC
t_EXH
t_EXcyc
t_EXL
V_IH
V_IH
V_IL
V_IL
t_EXf
V_IH
1/2 V_CC
t_EXr
Figure 21.1 Timing of EXTAL Input Clock Signal
Rev. 4.00 Jul. 25, 2008 Page 712 of 750
REJ09B0243-0400