SH7125_08 Datasheet, PDF (16/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

12.4.5 Multiprocessor Serial Data Transmission ............................................................. 465
12.4.6 Multiprocessor Serial Data Reception .................................................................. 466
12.5 SCI Interrupt Sources......................................................................................................... 469
12.6 Serial Port Register (SCSPTR) and SCI Pins .................................................................... 470
12.7 Usage Notes ....................................................................................................................... 471
12.7.1 SCTDR Writing and TDRE Flag.......................................................................... 471
12.7.2 Multiple Receive Error Occurrence ...................................................................... 471
12.7.3 Break Detection and Processing ........................................................................... 472
12.7.4 Sending a Break Signal......................................................................................... 472
12.7.5 Receive Data Sampling Timing and Receive Margin (Asynchronous Mode) ...... 472
12.7.6 Note on Using External Clock in Clock Synchronous Mode................................ 474
12.7.7 Module Standby Mode Setting ............................................................................. 474
Section 13 A/D Converter (ADC) ..................................................................... 475
13.1 Features.............................................................................................................................. 475
13.2 Input/Output Pins............................................................................................................... 477
13.3 Register Descriptions ......................................................................................................... 478
13.3.1 A/D Data Registers 0 to 7 (ADDR0 to ADDR7).................................................. 479
13.3.2 A/D Control/Status Registers_0 and _1 (ADCSR_0 and ADCSR_1) .................. 479
13.3.3 A/D Control Registers_0 and _1 (ADCR_0 and ADCR_1) ................................. 482
13.3.4 A/D Trigger Select Register_0 (ADTSR_0)......................................................... 485
13.4 Operation ........................................................................................................................... 489
13.4.1 Single Mode.......................................................................................................... 489
13.4.2 Continuous Scan Mode......................................................................................... 489
13.4.3 Single-Cycle Scan Mode ...................................................................................... 490
13.4.4 Input Sampling and A/D Conversion Time .......................................................... 490
13.4.5 A/D Converter Activation by MTU2 .................................................................... 493
13.4.6 External Trigger Input Timing.............................................................................. 493
13.4.7 2-Channel Scanning.............................................................................................. 494
13.5 Interrupt Sources................................................................................................................ 495
13.6 Definitions of A/D Conversion Accuracy.......................................................................... 496
13.7 Usage Notes ....................................................................................................................... 499
13.7.1 Module Standby Mode Setting ............................................................................. 499
13.7.2 Permissible Signal Source Impedance .................................................................. 499
13.7.3 Influences on Absolute Accuracy ......................................................................... 499
13.7.4 Range of Analog Power Supply and Other Pin Settings....................................... 500
13.7.5 Notes on Board Design ......................................................................................... 500
13.7.6 Notes on Noise Countermeasures ......................................................................... 501
Rev. 4.00 Jul. 25, 2008 Page xvi of xx