SH7125_08 Datasheet, PDF (688/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 19 Power-Down Modes
Initial
Bit
Bit Name Value R/W Description
0
MSTP16 1
R/W Module Stop Bit 16
When this bit is set to 1, the supply of the clock to the
A/D_0 is halted.
0: A/D_0 operates
1: Clock supply to A/D_0 halted
19.3.5 Standby Control Register 5 (STBCR5)
STBCR5 is an 8-bit readable/writable register that controls the operation of modules in power-
down mode.
Bit: 7
6
5
4
3
2
1
0
-
-
-
-
-
-
MSTP[25:24]
Initial value: 0
0
0
0
0
0
1
1
R/W: R
R
R
R
R
R R/W R/W
Bit
7 to 2
1, 0
Bit Name

Initial
Value
All 0
MSTP[25:24] 11
R/W Description
R Reserved
These bits are always read as 0. The write value should
always be 0.
R/W Module Stop Bit 25 and 24
When either or both of these bits are set to 1, the
supply of the clock to the UBC is halted.
00: UBC operates
01: Setting prohibited
10: Setting prohibited
11: Clock supply to UBC halted
Rev. 4.00 Jul. 25, 2008 Page 668 of 750
REJ09B0243-0400