SH7125_08 Datasheet, PDF (623/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 17 Flash Memory
Initial
Bit
Bit Name Value
R/W Description
0
SF
Undefined R/W Success/Fail
Indicates whether the program processing has ended
normally or not.
0: Programming has ended normally (no error)
1: Programming has ended abnormally (error occurs)
(4) Erasure Execution
When flash memory is erased, the erase-block number on the user MAT must be passed to the
erasing program which is downloaded. This is set to the FEBS parameter (general register R4).
One block is specified from the block number 0 to 15.
For details on the erasing procedure, see section 17.5.2, User Program Mode (Only in On-Chip
128-Kbyte and 64-Kbyte ROM Version).
(4.1) Flash erase block select parameter (FEBS: general register R4 of CPU)
This parameter specifies the erase-block number. Several block numbers cannot be specified.
Bit: 31
-
Initial value: -
R/W: R/W
30
-
-
R/W
29
-
-
R/W
28
-
-
R/W
27
-
-
R/W
26
-
-
R/W
25
-
-
R/W
24
-
-
R/W
23
-
-
R/W
22
-
-
R/W
21
-
-
R/W
20
-
-
R/W
19
-
-
R/W
18
-
-
R/W
17
-
-
R/W
16
-
-
R/W
Bit: 15
-
Initial value: -
R/W: R/W
14
-
-
R/W
13
-
-
R/W
12
-
-
R/W
11
-
-
R/W
10
-
-
R/W
9
-
-
R/W
8
-
-
R/W
7
-
R/W
6
-
R/W
5
-
R/W
4
3
EBS[7:0]
-
-
R/W R/W
2
-
R/W
1
-
R/W
0
-
R/W
Rev. 4.00 Jul. 25, 2008 Page 603 of 750
REJ09B0243-0400