SH7125_08 Datasheet, PDF (116/774 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Interrupt Controller (INTC)
6.3.3 IRQ Status register (IRQSR)
IRQSR is a 16-bit register that indicates the states of the external interrupt input pins IRQ0 to
IRQ3 and the status of interrupt request.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
- IRQ3L IRQ2L IRQ1L IRQ0L -
-
-
- IRQ3F IRQ2F IRQ1F IRQ0F
Initial value: 1
1
1
1
*
*
*
*
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W
Note: * The initial value is 1 when the level on the corresponding IRQ pin is high, and 0 when the level on the pin is low.
Bit
15 to 12
Bit Name

Initial
Value
All 1
11
IRQ3L
*
10
IRQ2L
*
9
IRQ1L
*
8
IRQ0L
*
7to 4 
All 0
R/W Description
R
Reserved
These bits are always read as 1.
R
Indicates the state of pin IRQ3.
0: State of pin IRQ3 is low
1: State of pin IRQ3 is high
R
Indicates the state of pin IRQ2.
0: State of pin IRQ2 is low
1: State of pin IRQ2 is high
R
Indicates the state of pin IRQ1.
0: State of pin IRQ1 is low
1: State of pin IRQ1 is high
R
Indicates the state of pin IRQ0.
0: State of pin IRQ0 is low
1: State of pin IRQ0 is high

Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 4.00 Jul. 25, 2008 Page 96 of 750
REJ09B0243-0400